In this paper, on–off switching digitization of a W-band variable gain power amplifier (VGPA) with above 60 dB dynamic range is introduced for large-scale phased array. Digitization techniques of on–off switching modified stacking transistors with partition are proposed to optimize configuration of control sub-cells. By the proposed techniques, gain control of a radio frequency variable gain amplifier (VGA) could be highly customized for both coarse and fine switching requirements instead of using additional digital-to-analog converters to tune the overall amplifier bias. The designed VGA in 130 nm SiGe has achieved switchable gain range from −46.4 to 20.6 dB and power range from −25.0 to 15.7 dBm at W band. The chip size of the fabricated VGPA is about 0.31 mm × 0.1 mm.

This paper furnishes a compact modified hourglass-shaped aperture-coupled antenna for radar applications. The effect of slots of various shapes and various slot lengths on the input impedance, radiation pattern, and gain of the antenna are analyzed. The proposed antenna, designed using a modified hourglass-shaped aperture, offers a gain of 8.214 dBi for an compact antenna with a dimension of 20.4 × 20.4 × 1.041 mm3 and an aperture area of 2.495 mm2. Implementation of this proposed modified hourglass-shaped aperture offers a high gain per unit radiating patch area of 40.26 dB/$\lambda _g ^2$ and a high gain per unit aperture area of 1324.84 dB/$\lambda _g ^2$. The proposed aperture feeds a circular patch which radiates at its resonant frequency of 10.5 GHz. The proposed design is fabricated and the simulated results are verified experimentally. Equivalent circuit analysis is also done. A measured gain of 7.2 dBi is observed at 10.5 GHz. The physical area of the antenna is reduced without compromising the gain by judiciously choosing the shape of slot with more degree of freedom for impedance matching. The proposed antenna is well suited for the unit cell of phased array antennas for X-band missile radar applications.

The 5th generation new radio (5G NR) standards create both enormous challenges and potential to address the spatio-spectral-temporal agility of wireless transmission. In the framework of a research unit at TU Ilmenau, various concepts were studied, including both approaches toward integrated circuits and distributed receiver front-ends (FEs). We report here on the latter approach, aiming at the proof-of-principle of the constituting FEs suitable for later modular extension. A millimeter-wave agile multi-beam FE with an integrated 4 by 1 antenna array for 5G wireless communications was designed, manufactured, and verified by measurements. The polarization is continuously electronically adjustable and the directions of signal reception are steerable by setting digital phase shifters. On purpose, these functions were realized by analog circuits, and digital signal processing was not applied. The agile polarization is created inside the analog, real-time capable FE in a novel manner and any external circuitry is omitted. The microstrip patch antenna array integrated into this module necessitated elaborate measurements within the scope of FE characterization, as the analog circuit and antenna form a single entity and cannot be assessed separately. Link measurements with broadband signals were successfully performed and analyzed in detail to determine the error vector magnitude contributions of the FE.

In this paper, we describe the design, layout, and performance of a 6-bit TTD (true time delay) chip operating over the entire band of 2–18 GHz. The 1.15 mm2 chip is implemented using TSMC foundry 65 nm technology. The least significant bit is 1 ps. The design is based on the concept of all-pass network with some modifications intended to reduce the number of unit cells. Thus, the first three bits are implemented in a single delay cell. A peaking buffer amplifier between bit 4 and bit 5 is used for impedance matching and partial compensation of the insertion loss slope. The rms delay error of the TTD is <1 ps over most of the frequency band and insertion loss is between 2.5 and 6.3 dB for all 64 states.

This contribution deals with a frontend for interleaved receive (Rx)-/transmit (Tx)-integrated phased arrays at K-/Ka-band. The circuit is realized in printed circuit board technology and feeds dual-band Rx/Tx- and single-band Tx-antenna elements. The dual-band element feed is composed of a substrate-integrated waveguide (SIW) diplexer with low insertion loss, a low-noise amplifier (LNA), a bandpass filter, and several passive transitions. The compression properties of the LNA are identified through two-tone measurements. The results dictate the maximum allowable output power of the power amplifier. The single band feed consists of a SIW with several transitions. Simulation and measurement results of the individual components are presented. The frontend is assembled and measured. It exhibits an Rx noise figure of 2 dB, a Tx insertion loss of ~ 2.9 dB, and an Rx/Tx-isolation of 70 dB. The setup represents the unit cell of a full array and thus complies with the required half-wave spacing at both Rx and Tx.

A highly integrated Ku-band (10.7–12.75 GHz) planar phased array receiver of 64 antenna elements is presented. It features instantaneous reception of the full Ku-band (2.05 GHz wide) in two orthogonal polarizations with wide scan angles by using time delay instead of phase shift. The receiver is part of a system for satellite broadcast TV reception on board of moving vehicles. Two SiGe radio frequency integrated circuits (RFICs) were developed, packaged in ceramic BGAs and assembled onto a 15-layer printed circuit board (PCB) which integrates the antenna elements. An outline of the system is given along with a detailed description. It sets a new standard in integration density. The receiver has extensive analog signal processing at intermediate frequency (IF)-level. A novel bipolar implementation for true time delay is proposed, with a continuous programmable delay range of 0…80 ps with less than 2.5 ps group-delay variation in 2 GHz bandwidth (BW). The wide BW calls for a constant group-delay implementation in the IF chain. The receiver (RFIC) consumes only 132 mW per channel. Each channel has 40 dB gain.