Integrated GaN synchronous buck converter MMIC

The core element of the converter as well as the ET supply modulator module is the GaN-based 2-stage MMIC which has been fabricated using the FBH 0.25 μm GaN-HEMT process (GaN-on-SiC). The monolithic integration of the power switches and drivers is an important requirement to minimize the parasitic inductances, at least to the low nH-range, for operation at 100 MHz and beyond. Figures 1 and 2 show the schematic and the chip photograph of the integrated buck converter.

Fig. 1. Schematic of the 2-stage GaN converter MMIC.

Fig. 2. Chip photograph of the realized GaN converter MMIC; chip area: 1.6 × 2.4 mm².

The 2-stage circuit uses two 8 × 250 μm GaN-HEMTs (T ₁, T ₂) in a half-bridge configuration in the final-stage to switch the switching node RF_out between V_dcin and 0 V (cp. Fig. 1). The driver is an active pull-up circuit comparable to the one published in [Reference Zhang, Rodriguez and Maksimovic1], simply connecting the high-side driver (drain of T_{D 3}) to the switching node RF_out. This significantly reduces power dissipation in the upper driver (T_{D 3}) while at the same time the drain potential of T_{D 3} cannot exceed the V_dcin value. If V_gd across T_{D 3} is large enough so that it is in saturation region, it behaves as a current source. For a given value of R ₁ the following equation is valid: V_gs = − R ₁ ⋅ I_d. Here V_gs then determines the drain current based on the device I_d (V_gs) characteristic in saturation. The source degeneration resistance R ₁ can be selected to set the current limit for the active pull-up circuit, relatively independently from variations in the device threshold voltage. In order to turn the high side switch T ₁ on, T_{D 1} is turned off, and T_{D 3} turns on, pulling the gate of T ₁ up to V_dd = V_dcin. During T ₁ turn-on transition, RF_out ramps up to V_dcin. As a result, V_gs of T ₁ is maintained at ~0 V which means that he is fully switched on. T ₂ is fully switched off. This is accomplished by turning the low-side gate-drive transistor T_{D 2} on, bringing the gate of T ₂ to: V_s (low side) + I_{TD 4} × R_{TD 2,on} = around −5 V. The transistors T_{D 1} and T_{D 4} are 2 × 125 μm in size while T_{D 2} and T_{D 3} are 4 × 125 μm devices. Further information on the operation principle is given in [Reference Zhang, Rodriguez and Maksimovic1].

The main difference to [Reference Zhang, Rodriguez and Maksimovic1] is that in our case no freewheeling diodes are used at the output of the final-stage to protect the transistors against negative voltage transients. It turned out in measurements that our GaN-HEMTs can handle negative V _DS-swings up to −70 V for hundreds of nanoseconds. This leads to an important advantage compared to [Reference Zhang, Rodriguez and Maksimovic1]. The resulting parasitic capacitance at the output of the power stage is lower as it is reduced by the value of the diode's capacitances. This reduces losses and thus improves efficiency. Moreover, it saves chip area and cost. Figure 2 presents a photo of the compact GaN converter MMIC with an area of 1.6 × 2.4 mm² only.

For this power core only GaN was used as a semiconductor technology as it combines speed with high maximum voltages and currents. This makes it the perfect candidate for the targeted application as a high frequency switching and thus compact power converter. However, in a full chain a pre-driver is required (see also Section “Measurements”) which would be realized in silicon, but this was not part of this work. As the converter MMIC with its transistor sizes (see above) reaches efficiencies of more than 50% with broadband bit sequences at switching frequencies up to 1 GHz (50% duty-cycle) it is not only suitable for a GHz switching VHF converter, which was the focus of [Reference Wentzel, Hilt, Würfl and Heinrich10], but also a candidate as a modulator for broadband ET systems, e.g., published in [Reference Komatsuzaki, Lanfranco, Kolmonen, Piirainen, Tanskanen, Sakata, Ma, Shinjo, Yamanaka and Asbeck4]. Along with the requirements of new mobile communication standards these systems need modulators which can handle 1 GHz and more of bandwidth when aiming for typical 5 G scenarios in the 28 GHz range. One only has to change the output network according to the application. This illustrates the flexibility of the (integrated) digital PA/converter approach. The operation as a modulator in ET systems is the topic added in this paper extension compared to [Reference Wentzel, Hilt, Würfl and Heinrich10]. The module design with regard to the two application examples mentioned above including the realized GaN buck converter MMIC (cp. Figs 1 and 2) will be shown in the next two subsections.

DC/DC converter module

The fabricated GaN buck converter MMIC from the previous subsection together with a hybrid printed circuit board (PCB) forms the DC/DC converter module. The PCB is realized on Rogers 4003C laminate with a thickness of 0.305 mm. It is connected to the chip via gold bond-wires and contains biasing circuitries (bias-Ts, lines, blocking capacitors, connectors) for the chip and the output DC-to-DC conversion circuit. The conversion circuit is composed of two 538 nH air-core inductors from Coilcraft's Maxi Spring^TM series and a 470 pF ATC capacitor (0603) to ground forming a low-pass configuration.

The use of air-core inductors is important since it avoids the ferrite losses and thus saturation. This is, in addition to an integrated converter with minimized inductive loops, the major requirement for efficient VHF converters operating in the high MHz up to GHz range. Figure 3 presents the compact realized module exhibiting a volume of 50 × 33 × 15 mm³ only.

Fig. 3. Photograph of realized converter module including GaN converter MMIC and hybrid PCB with conversion (2 air-core inductors, 1 capacitor) and biasing circuitry (bias-T, RF blocking capacitors); module size: 50 × 33 × 15 mm³.

Envelope tracking supply modulator module

The realized GaN buck converter MMIC described in Section “Integrated GaN Synchronous Buck Converter MMIC” can also be used as the core active element for a supply modulator for broadband continuous ET systems. This is illustrated in Fig. 4.

Fig. 4. Proposed ET system with digital PA as a supply modulator for extreme modulation bandwidths.

The amplitude information of the modulated input signal, the envelope, is tracked and utilized by the RF PA. The envelope information is modulated with the supply modulator and is used to provide the right supply voltage for the main RF PA according to the modulated input signal of the system. In this way, it is ensured that the PA is operating at peak efficiency for the given instantaneous output power requirements. In the proposed system shown in Fig. 4 the supply modulator will take advantage of the digital PA approach to serve extreme modulation bandwidths up to the GHz range. This makes the proposed ET system suitable for applications in the 30 GHz range where such high modulation bandwidths are required. However, as a first step, this paper will focus on maximum 500 MHz modulation bandwidth operation which is manageable in the 5 G sub-6 GHz circuits.

As the chip (cp. Section “Integrated GaN Synchronous Buck Converter MMIC”) is designed as a digital switching PA without any narrowband reactive matching it is an ideal building block for testing it in the proposed ET system from Fig. 4. To do so the GaN buck converter MMIC has been combined with a simple lumped-element 2^nd order low-pass filter architecture providing a cut-off frequency of 700 MHz. Its schematic is shown in Fig. 5.

Fig. 5. Schematic (left) and photograph (right) of a 2^nd order low-pass filter with 700 MHz cut-off for the proposed ET system in Fig. 4 to suppress all harmonics higher than modulation bandwidth; C1 = 7.5 pF, C2 = 5.2 pF, L1 = 18 nH, L2 = 16 nH.

As a first design goal the cut-off has been chosen in a way that the proposed ET system can operate up to 500 MHz of modulation bandwidth at a low insertion loss. This means the switching frequency of the pulse pattern for this maximum bandwidth is at least 1 GHz which can be suppressed satisfactorily by the proposed filter architecture. Moreover, the chosen 2^nd order low-pass could be realized in a compact way with commercially available elements showing a good performance for the targeted application. The filter uses Murata GRM 0603 capacitors and Coilcraft air-core inductors from the low profile mini spring series.

The proposed filter from Fig. 5 has been realized on a Rogers 4003C PCB laminate with a thickness of 0.5 mm. The complete board has been EM simulated in ADS^TM Momentum and lumped element models have been included to have a full picture of the expected filter behavior. Figure 6 presents the simulated filter characteristic with S-parameters S ₁₁ and S ₂₁ for 0 … 5 GHz and inserted zoom from 0 … 1 GHz for 50 Ω input and output reference impedance.

Fig. 6. Simulated input reflection (S ₁₁) and insertion loss (S ₂₁) of realized 2^nd order low-pass filter architecture to be used at supply modulator output before main PA drain supply; reference impedance input/output: 50 Ω.

The filter shows an insertion loss S ₂₁ of almost 0 and 0.47 dB at DC and 500 MHz, respectively. Beyond 840 MHz all spectral components are suppressed by at least 10 dB. At 1 GHz the suppression is around 18 dB which is sufficient. The input return loss S ₁₁ stays above 10 dB up to 600 MHz. As the impedance at the drain supply connection of the main RF PA (see Fig. 4) can vary according to the operation region one needs to check the filter characteristics for other output reference impedances at the supply modulator. From calculations and estimation the impedance varies roughly between 20 … 80 Ω. Again from simulation the insertion loss at 500 MHz shows 0.2 and 1.1 dB for 20 and 80 Ω drain input impedance, i.e., filter output impedance, respectively. At DC the attenuation is 0.9 dB (20 Ω) and 0.25 dB (80 Ω). Summing up the filter results one can state that it represents a good compromise between losses in the wanted range up to 500 MHz, steepness and suppression of switching frequencies beyond 1 GHz. If the filter order would be increased to higher order design the steepness and suppression of the switching frequency would be significantly increased. Simulations show attenuation beyond 30 dB for the 1 GHz component. But the disadvantage is a higher ripple in the passband which leads also to higher insertion loss at the wanted frequencies (500 MHz). So for this work we decided to use the more simple, compact and robust solution.

Now the low-pass filter is connected to the GaN converter MMIC module from Section “DC/DC Converter Module.” But the difference is that the DC/DC converter output network (2 × 538 nH, 470 pF) has been unsoldered and the low-pass network for ET operation is connected on a flexible Rogers board (cp. Section “Envelope Tracking Supply Modulator Module”) via a second 10 mm long microstrip output line of the module presented in Section “DC/DC Converter Module.” This line length has been already included in the simulations shown above in Fig. 6. In a final ET demonstrator which is not part of this paper all components will be integrated on one carrier with reduced line lengths to provide short interconnects. But for now the modular approach with a separated buck converter and low-pass filter is preferred as it gives the required flexibility in the development stage.

Converter switching frequency: 1 GHz

This subsection presents and discusses the measurement results for 1 GHz converter switching frequency. First, Fig. 7 plots the PAE versus DC output power, obtained for different duty-cycles (50 … 90%) and power stage drain supply voltages (20 V, 30 V, 40 V_dcin, cp. Fig. 1).

Fig. 7. Measured PAE versus DC output power, DC input voltage (V_dcin) and duty-cycle (d.c.) of the PWM input signal for the realized buck converter module; d.c.: 50 … 90%, V_dcin: 20, 30, 40 V; switching frequency: 1 GHz.

One clearly observes the expected behavior that the efficiency increases with higher duty-cycle peaking at 74% for V_dcin = 40 V and 90% duty-cycle of the PWM input signal. DC output power at a 50 Ohm load reaches 22 W for this condition.

Moreover, for almost every used duty-cycle the PAE rises with DC input voltage at the power stage. In terms of 60 and 70% d.c. one observes a small drop in PAE compared to 30 V supply when operating the converter at 40 V_dcin. In general we have to state that operation for duty-cycles below 50% is very inefficient, i.e., PAE drops down to 20%, when switching the converter at 1 GHz. This is due to the fact that the pulses are getting more narrow (<<1 ns) and thus close to the rise time of the used 2 mm GaN HEMTs in the power stage. Pulses get distorted and the expected output power is not achieved. This will be clarified more in Section “Converter Performance Comparison: 100 MHz versus 1 GHz Switching Frequency.” Here, one has to find the best trade-off between DC output power and speed. But, as this is our first realization, the results are very encouraging for further converter activities.

To have a closer look at the potential of the realized DC/DC converter Fig. 8(a) shows simulated waveforms at input and output while Fig. 8(b) displays measured DC output power (P_dcout) as well as output voltage (V_dcout) and PAE versus duty-cycle for the most challenging conditions, i.e., 40 V_dcin and 1 GHz switching.

Fig. 8. (a) Simulated waveforms of input gate-source voltages V_gs1/2 (RF_in1/2–V _s in Fig. 1; dotted/solid gray), switch-node output voltage before the filter (RF_out in Fig. 1, V_out (dotted black)) and output voltage after the filter (V_dcout; solid black); time section: 30 ns, DC input voltage (V_dcin in Fig. 1): 40 V, switching frequency: 1 GHz, input duty-cycle: 90%. (b) Measured DC output power (P_dcout), DC output voltage (V_dcout) and PAE versus duty-cycle of PWM input signal of the realized buck converter module for power stage supply voltage V_dcin of 40 V and 1 GHz switching frequency.

From Fig. 8(a) one can see the clean switching in the stages of the buck converter in simulations. Unfortunately, correct probing on the chip and at the output before the filter during the measurements was not possible. However, simulations give a good insight. Only some minor distortions due to bond-wires and capacitances of the switching transistors can be observed. The output swing reaches 38 V maximum for a DC input voltage of 40 V. After the conversion circuit (cp. Section “DC/DC Converter Module”) the reached DC voltage is 34 V. This agrees very well with the measured results shown in Fig. 8(b). All three parameters increase when raising the duty-cycle from 50 up to 90%. The DC input voltage of 40 V at the power stage is converted to 33.4 V at the output load (50 Ohm) for 90% d.c. in a 22 W (P_dcout) conversion. With a 50% duty-cycle input signal the PAE peaks at 29% for a 5.1 W conversion to 16.2 V. These efficiency values clearly need improvement and should approach the high duty-cycle ones in further realizations. But as already stated the drop in efficiency for the narrow pulses is an indication for the switching speed limits of the used GaN HEMTs, especially in the final power-stage. There is still room for improvement in further designs. In order to compare with a lower switching frequency the next subsection presents the results for 100 MHz and compares them to 1 GHz.

Converter performance comparison: 100 MHz versus 1 GHz switching frequency

The converted DC output power (P_dcout) and appropriate voltages V_dcout are compared for 100 MHz and 1 GHz switching frequency of the converter, respectively. Table 1 summarizes the results for a DC input supply voltage at the power stage V_dcin of 30 V measured at a 50 Ohm load.

Table 1. Comparison of measured DC output voltage (V_dcout) and power (P_dcout) for varying duty-cycle (d.c.) for realized buck converter module; V_dcin = const. = 30 V

In 100 MHz operation the DC/DC converter delivers for almost every duty-cycle a higher output voltage and thus converted DC output power than for the 1 GHz case. This is a result of the wider pulses arising in the 100 MHz switching case. As already described the pulses get obviously more distorted by the transistors for higher input frequencies due to f_T/f_max limits. This will also show up in the efficiency characteristics. They are plotted in Fig. 9 for 30 V DC input voltage and compare the PAE as well as power loop efficiency (η_drain) for both switching frequencies (100 MHz versus 1 GHz).

Fig. 9. Measured power loop efficiency (η_drain) and PAE versus duty-cycle of the PWM input signal for 100 MHz and 1 GHz switching frequency of the realized converter; power stage supply voltage (V_dcin) = 30 V.

One clearly observes that the values from Table 1 are translated into the efficiency characteristics of the converter. For all duty-cycles the power loop efficiency in the 100 MHz case stays above 80%, peaking at 87.5% for a d.c. of 90%. Only for the highest duty-cycle tested (90%) the efficiencies for both switching frequencies are converging, i.e., 78% for 1 GHz and 87.5% for 100 MHz. Again, this proves the influence of the frequency limits of the applied GaN HEMTs on the performance.

Another important observation from Fig. 9 is the small difference between PAE and final-stage power loop efficiency of the converter. In the 1 GHz case, the power loop efficiency peaks at 78% while PAE reaches 74% at this point. This proves that the gate drivers of the power stage switches consume very low power which is important for the overall energy budget. Finally, Table 2 compares the achieved results with the state-of-the-art buck converters published working in the hundreds of MHz switching frequency (f_sw) region.

Table 2. Comparison of reached converter performance with state-of-the-art GaN-based integrated buck converters

In terms of combining high switching frequencies with high efficiencies and DC output powers beyond 10 W the proposed GaN buck converter module is the best solution to date. If one normalizes the output power values in Table 2 to a total 2 mm final-stage gate-width (far right column) to be comparable we still recognize that the proposed solution represents the best trade-off of all published high frequency converters so far. But as already stated the efficiency drop for duty-cycles below 50% must be solved, also for higher switching frequencies beyond 1 GHz. However, summarizing we can state that the realized GaN-based buck converter module is a suitable candidate for future small and efficient VHF power converters. They can be used for example to replace bulky power supplies for laptops or comparable applications.

Furthermore, it is possible to adapt the fabricated GaN converter MMIC for the modulator part in a broadband ET system. One only has to change the output network. The supply modulator setup is shown and explained in Section “Envelope Tracking Supply Modulator Module” while the measurements will be presented in the following subsection.

Envelope tracking supply modulator characterization

The realized supply modulator has been measured with the same setup described above. A PWM input signal with varying duty-cycle at 1 GHz switching frequency has been applied to the demonstrator. The DC output voltage was measured at a fixed 50 Ω load. Input DC drain supply voltage V_dcin (cp. Fig. 1) was fixed at 27.5 V. This is due to the fact that the targeted main PA (not covered in this paper) requires a drain supply voltage variation between 8… 25 V for optimized efficiencies over a 10 dB power back-off range, which was derived from static measurements. This can be translated into a duty-cycle variation of the PWM input bit stream of the modulator between 30 and 90%, respectively, when assuming a maximum V_dcin at the supply modulator final-stage drain of 27.5 V. Figure 10(a) shows the simulated waveforms at the input and output of the modulator chip (cp. Fig. 1) while Fig. 10(b) plots the measured DC output voltage (V_dcout) versus duty-cycle and the calculated appropriate PAE for the realized ET supply modulator utilizing digital PA approach from Section “Envelope Tracking Supply Modulator Module.”

Fig. 10. (a) Simulated waveforms of input gate-source voltages V_{gs 1/2} (RF_in1/2–V _s in Fig. 1; dotted/solid gray), switch-node output voltage before the filter (RF_out in Fig. 1, V _out (dotted black)) and output voltage after the filter (V_dcout; solid black); time section: 30 ns, DC input voltage (V_dcin in Fig. 1): 27.5 V, switching frequency: 1 GHz, input duty-cycle: 90%. (b) Measured PAE and DC output voltage (V_dcout) of the realized digital supply modulator circuit for ET applications; f _sw = 1 GHz.

The simulated waveforms in Fig. 10(a) show a clean switching of the two stages of the proposed converter MMIC (cp. Fig. 1), which is comparable to the waveforms in Fig. 8(a). Of course, the output voltage after the filter has another shape as, according to the targeted application, a wider passband low-pass filter is used in the ET case. The DC component at the output derived from simulations is 22.7 V which is a bit lower than in the measurements. The results are plotted in the next figure.

From Fig. 10(b), for a switching frequency f_sw of 1 GHz, one clearly observes an increase of V_dcout and PAE with increased duty-cycle of the input PWM bit stream. Starting at 8.2 V for 30% duty-cycle the DC output voltage reaches maximum 24.7 V at 90% duty-cycle. This voltage range is sufficient in terms of drain supply for the targeted main RF PA (see above). The appropriate PAE is only 16% for a 30% duty-cycle input signal and peaks at 74% for a duty-cycle of 90%. The efficiency values stay below 50% for duty-cycles up to 60% which clearly needs improvement.

Also, if one would increase the order of the output filter (cp. Section “Envelope Tracking Supply Modulator Module”) we do not expect much higher efficiency values as the insertion losses would increase as well. But a higher suppression of the unwanted frequency components may result in small efficiency increase when conducting modulated measurements in dynamic operation of the ET system. This will be checked in future work with different setups.

But as the focus of this work was primarily on VHF power converters the results are promising, especially against the background of the very high switching frequency compared to other supply modulator solutions so far [Reference Komatsuzaki, Lanfranco, Kolmonen, Piirainen, Tanskanen, Sakata, Ma, Shinjo, Yamanaka and Asbeck4, Reference Hong, Mukai, Gheidi, Shinjo and Asbeck7, Reference Lasser, Duffy, Vance and Popovic11]. However, in fact, for ET systems in the 30 GHz range with targeted modulation bandwidths up to GHz the digital PA approach as a supply modulator is a real alternative but needs a lot of redesign and optimization. This is particularly true for an efficient lower duty-cycle operation in order to not destroy the overall ET system efficiency.