II. BROADBAND AMPLIFICATION APPROACHES: DISTRIBUTED VERSUS LUMPED

Broadband performance of both low-frequency and millimeter-wave (mm-wave) amplifiers has been achieved in general by using two different design approaches, namely the distributed integrated circuits and the conventional lumped circuits [Reference Hajimiri9, Reference Heydari10]. One major advantage of the distributed approach is that the parasitic capacitance of the transistors can be designed to be absorbed as part of the transmission line's parameters; and as the effective highest frequency of operation of a technology is much lower than its f _T on account of the parasitics associated with the active and passive components, this results in avoiding a sharp frequency roll-off and in achieving a gain-bandwidth product much larger than the conventional lumped circuit design. However, the bandwidth extension achieved through a distributed approach is inherently linked to larger time delays between input and output and hence a circuit with higher group delays. Furthermore, on account of usage of transmission lines and higher number of gain stages, the physical size of the circuits becomes significantly larger than the lumped architectures. The distributed circuit design approach has been utilized in both Si/SiGe and III–V semiconductors. In [Reference Sangwoo, Lee, Urteaga, Kim and Sanggeun11] a fully-integrated 250 nm, InP HBT based distributed amplifier (DA) was presented, which was designed using four cascode gain stages with inductive peaking. The amplifier achieved 10 dB gain, a 3-dB bandwidth of 182 GHz (40–222 GHz), and a P _SAT of 8.5 dBm at 134 GHz. Using 35 nm mHEMT process a 3-dB bandwidth of 96 GHz from 50 to 146 GHz was achieved with a P _SAT of 13 dBm at 140 GHz [Reference Pahl12]. In [Reference Eriksson, Darwazeh and Zirath13], one of the highest reported bandwidths of 235 GHz was achieved in InP DHBT, but no large signal characterizations were presented. Recently, in 130 nm SiGe BiCMOS process a 3-dB bandwidth of 180 GHz with a peak gain of 18.7 dB has been demonstrated using cascaded DAs with electrically trimmable resistors. However, a measured output power of only 2.5 dBm is achieved at 100 GHz [Reference Fritsche, Tretter, Carta and Ellinger14]. On the other hand, achieving high bandwidths/power in mm-wave using lumped circuit approach is strongly dependent on technology parameters. Bandwidths of up to 30 GHz [Reference Hsiao, Tsai, Liao, Kao and Wang15], and 40 GHz [Reference Furqan, Ahmed, Rücker and Stelzer16] have been demonstrated for D-band medium PAs based on CMOS and SiGe HBT technologies. Thus so far, no Si-based amplifier capable of delivering more than 5 dBm output power over the entire D-band has been reported. This paper is an extension of the reported PA in [Reference Ahmed, Furqan, Aufinger and Stelzer17].

III. ANALYSIS OF BROADBAND MULTISTAGE MATCHING BASED ON CASCODE AMPLIFIERS

Although a common-base (CB) or a common-gate (CG) amplifier provides a wide input match with an input impedance (approximately given by 1/g _m ), which can be directly matched to a 50-Ω source, the gain-per-stage is quite low, and for achieving reasonable gains the CB stage is followed by a common-emitter (CE) or a cascode stage [Reference Ahmed, Furqan, Aufinger and Stelzer18]. However, the CE or the cascode stage significantly limits the bandwidth. This paper presents a method to overcome this limitation, while taking advantage of high-gain and output power capability of the cascode stage. A single cascode stage with the input/output matched to a real impedance can provide a relatively broader frequency response, when using a higher number of reactive elements [Reference Furqan, Ahmed, Rücker and Stelzer16]. However, when more stages are cascaded, the bandwidth of the amplifier starts to suffer. Furthermore, when operating in mm-wave region the additional loss occurring at each input and output matching network becomes non negligible. The input impedance of the cascode stage is considerably less reactive as compared to its output impedance, and with a proper device size selection a fairly good wideband input match can be attained even using a simple two-reactance matching network. Furthermore, for multistage designs the gain and bandwidth is strongly determined by the interstage matching. For a multistage cascode amplifier, the interstage matching is between the output of a CB stage and the input of the subsequent CE stage. The high-frequency equivalent π-model of a cascode stage showing the input matching to a source, and the interstage matching to the CE-stage is presented in Fig. 1(a). The input matching consists of a simple L-type matching network, while the interstage network is designed using  four reactances. The input impedance of the next stage is denoted by Z _π2 being composed of C _π2 and r _π2. As mentioned earlier the input matching does not play a major role in determining the gain profile over frequency, and as such the transimpedance-gain (v ₀/i ₁) of the CB stage plays the most significant role in defining the overall frequency response. A model for determining the transimpedance-gain is shown in Fig. 1(b), where the input current is represented by a current source i ₁. This model can be further simplified if it is considered that β + 1 ≈ β, which means that the base current is neglected. This consideration is especially valid when the circuit is operated at a high collector voltage, in which case the positive base current is compensated by the reverse current of the base-collector junction, a point known as base-current-reversal (BCR). Furthermore, on neglecting the collector output resistance r ₀, the model is further simplified (as shown in Fig. 1(c)), and the calculated transimpedance function is given by

(1) $$\displaystyle{{v_o} \over {i_1}} = - \displaystyle{{Z_{L2} Z_{\mu 1} Z_{\pi 2}} \over \matrix {Z_{L2} (Z_{L3} + Z_{\mu 1} ) + Z_{L3} Z_{\mu 1} + Z_{C1} (Z_{L1} + Z_{L2} + Z_{\mu 1} ) \cr +\, (Z_{L2} + Z_{\mu 1} )Z_{\pi 2} + Z_{L1} (Z_{L2} + Z_{L3} + Z_{\pi 2} )} },$$

where Z _L1, Z _L2, Z _L3, Z _C1, Z _μ1 and Z _π2 are the impedances associated with L ₁, L ₂, L ₃, C ₁, C _μ1, and $C_{\pi 2} {\rm \parallel} r_{\pi 2} $ , respectively. This transfer function has two poles, given by

(2) $$\omega _p^2 = \displaystyle{{B \pm \sqrt {B^2 - 4AC}} \over {2A}},$$

where

(3) $$A = C_1 C_{\mu 1} C_{\pi 2} (L_1 L_2 + L_1 L_3 + L_2 L_3 ),$$

(4) $$\eqalign{B & = C_{\mu 1} L_1 (C_1 + C_{\pi 2} ) + C_1 L_2 (C_{\mu 1} + C_{\pi 2} ) \cr & \quad + C_{\pi 2} (C_{\mu 1} L_2+ C_1 L_3 ),}$$

(5) $$C = C_1 + C_{\pi 2}. $$

Fig. 1. (a) High-frequency equivalent π-model of the cascode stage with the proposed output interstage broadband matching network. (b) Model for calculating the transimpedance transfer function. (c) Simplified model when the CB base current and r ₀ is ignored.

As seen by the equations the location of these two poles can be adjusted by means of the matching elements and the device parameters, most significantly by C _μ1 and C _π2, as r _π2 has a very weak effect and can be neglected. A simulated plot (using the Spectre RF Gummel–Poon model) of the transimpedance-gain is shown in Fig. 2(a) (L ₁ = 35 pH, L ₂ = 35 pH, L ₃ = 60 pH, C ₁ = 23 fF, and emitter-size of both CB and CE stage = 0.13 × 10 µm²). The presence of two peaks in the transfer function is clearly visible, which helps to extend the bandwidth. Another graph is plotted using the exact analytical expression derived from Fig. 1(b) and shows an excellent match with the simulation. The small-signal equivalent circuit parameters for the calculated plots are directly extracted from the Gummel–Poon model of the HBT following the procedure described in [Reference Costa, Liu and Harris19] (C _μ1 = 14 fF, C _π2 = 60 fF, r _π2 = 50 Ω, r ₀ = 1.5 kΩ, and f _T  = 270 GHz). The much simplified model (cf. Fig 1(c)) also shows a very good correlation with the simulated plots, which confirms the validity of the zero-base-current assumption. Thus, equations (1)–(5) can be used for initial design steps of designing a wideband response. Proper device size selection remains a critical part of both LNA and PA design procedures, especially in mm-wave frequency range. The variation of C _μ and C _π with increasing HBT device size is plotted in Fig. 2(b), which shows that C _π varies more strongly with device size as compared with C _μ and therefore should be carefully considered while designing. For LNA design usually smaller size HBTs are preferred because of their higher gain and better noise performance [Reference Voinigescu20, Reference Liu and Schuhmacher21]. The smaller size translates into lower bias currents and lower power consumption, considering that in mm-wave operation the current density is usually kept close to peak-f _T current density. However, smaller devices have much limited output power capability, which is especially important for PA designs. The effect of device size selection on the frequency response of the transimpedance-gain is investigated by varying the device size of the CB-stage and the CE-stage individually, and is plotted in Figs 2(c) and 2(d) using (1). It is seen in Fig. 2(c) that as size of the CB-stage is decreased (which translates to a decrease in C _μ1), the poles of the transfer-function move apart with a decrease in the overall gain. On the other hand, the location of the poles is not much affected when the device size of the CE-stage is varied, but there is an increase in gain-peaking with larger device areas, accompanied with a drop in mid-band gain. This gives us an insight that while using the four-reactance matching network, larger fractional bandwidths can be attained using smaller HBTs. The presented analysis has shown how a wideband frequency response can be achieved using the transimpedance-gain profile of two cascode stages. However, there is a drop in the midband gain with increased bandwidth. This decrease in gain can be compensated using staggered-gain tuning of multiple stages. This approach will be further explained in the circuit design section.

Fig. 2. (a) Transimpedance-gain of the CB-stage when matched to the next CE-stage, plotted using the high-frequency analytical model (cf. Fig. 1(b)), the simplified model (cf. Fig. 1(c) and (1)), and Spectre RF simulation. (b) Simulated C _μ and C _π of the high-frequency HBTs as a function of their device size. The effective emitter-width is kept constant at 0.13 μm, while the emitter-length is varied (1 μm, 5 μm, 10 μm, 7 × 2 μm², and 10 × 2 μm²). (c) The analytical plots for the variation of the transimpedance-gain over frequency as a function of device size of the CB-stage (C _μ1), size of CE-stage is 0.13 × 10 μm², and (d) the CE-stage (C _π2), size of CB-stage is 0.13 × 10 μm².

IV. CIRCUIT DESIGN

The broadband PA is designed in Infineon's advanced SiGe BiCMOS technology B11HFC. The process features HBTs with a minimum effective emitter width of 130 nm, which has an f _T /f _max of 250/370 GHz and a collector–emitter breakdown voltage BV _CEO of 1.5 V. Two thick copper layers are available for RF transmission lines and additional four thin layers for interconnections. The major goal of the design was to achieve a 3-dB bandwidth covering at least the entire D-band (110–170 GHz). Secondary goals were high-gain, good output power, and noise figure. Such performance metrics make the design and the amplifier especially suitable to be used both as an input and/or output amplifier for high-resolution radar sensors. The schematic of the designed PA is shown in Fig. 3(a). Following the approach outlined in the analysis, first a wideband transimpedance-gain profile is designed using the first two cascode stages and the four-reactance matching network. HBTs with 6 µm emitter-length with double-base, double-collector configuration are selected for the first stage. The device size allows for a wideband input match to a 100-Ω source with a simple L-type matching network, while simultaneously allowing for a high-gain and good noise performance. The multiple base and collector contacts help in reducing the series resistance and achieving a uniform contact current. The transimpedance-gain profiles for the four stages are plotted in Fig. 3(b). These profiles are very similar to the power-gain profiles presented in [Reference Ahmed, Furqan, Aufinger and Stelzer17]. The second- and third-stage transimpedance is designed such that the bandwidth is further increased. The size of the devices is also increased to have total emitter length of 8 and 10 µm, respectively, which helps to increase output power. However, as shown in Fig. 2(d), the increased C _π of the subsequent stage, leads to a drop in midband gain. This midband gain is then compensated using the last stage (emitter length, 12 µm) with a tuned gain maximum around 150 GHz. The effect of this staggered tuning is evident in Fig. 3(c). The first two stages provide a relatively uniform gain over a wide bandwidth, the third stage increases the bandwidth further but the gain ripple is much more pronounced, and the final stage with the largest device size, achieves the desired bandwidth and gain flatness. A carefully designed layout is one of the most critical aspect of high-frequency circuit design. This is especially important when designing in the mm-wave range. The placement of the active/passive devices, the layout of the transmission lines and the via stacks should be done in a way to reduce unwanted coupling and parasitics (e.g. using non-parallel lines, using large inter-line spacing, etc.) and the overall layout to be as symmetric as possible. The layout of the first two stages of the amplifier is presented in Fig. 4(a). All the contact and via parasitics have been simulated in Sonnet. In order to characterize the broadband amplifier a modified wideband Marchand balun was designed in CST Microwave Studio (cf. Fig. 4(b)) following the approach presented in [Reference Ahmed, Furqan and Stelzer22]. The balun is based on three folded symmetric coupled lines each of 2.4 μm width with a spacing of 3.3 μm. The open-ended λ _g /2 line is about 445 μm. The symmetric coupled line reduces the phase velocity difference by means of increased mutual capacitance, which leads to an improved amplitude imbalance over a wide bandwidth.

Fig. 3. (a) Schematic representation of the D-band broadband PA. (b) Simulated transimpedance-gain of the individual stages (calculated from the CB-stage to the input of the next CE-stage) of the D-band broadband amplifier. (c) Combined power-gain profiles of the amplifier emphasizing the effect of staggered-gain tuning.

Fig. 4. (a) Layout design of the first two cascode stages of the PA in Sonnet. (b) Perspective view of the D-band modified Marchand balun simulated in CST.

V. MEASUREMENTS

The chip micrograph of the D-band PA including the input/output modified Marchand balun is shown in Fig. 5(a). The core amplifier is highly compact and occupies an area of only 0.1 mm². Because of the very high operation bandwidth the small- and large-signal measurements are performed over the W- and D-bands. Measurements beyond 180 GHz could not be performed because of lack of signal-source in this frequency range. Frequency extenders from R&S and OML were used in the W- and D-band frequency range, respectively, in conjunction with R&S ZVT20 VNA. Additionally, because of limited output power of the D-band converters, an external F-band (90–140 GHz) frequency multiplier from RPG was used to conduct large signal measurements. The Marchand balun was characterized separately on a cut-out, as shown in Fig. 5(b). Because of the unavailability of three-port measurements, the single balun was integrated with on-chip 50-Ω tantalum based load resistors together with aluminum fuses, to measure amplitude and phase imbalance at both ports. The simulated and measured results are shown in Fig. 6(a), with a 2-dB insertion loss bandwidth of more than 60 GHz. Some differences in simulation and measurements (especially in the return-loss) are expected due to the non-ideal and frequency-dependent behavior of the on-chip tantalum resistor and the fuse (which are not accounted for in CST while using waveguide ports). Another measurement was performed on a back-to-back balun for calculating the total loss. The differential small-signal gain of the PA with a peak gain of 24.8 dB (balun loss is de-embedded) while drawing 97 mA from a 2.7 V supply, is shown in Fig. 6(b). The measured 3-dB bandwidth extends from 100 GHz to more than 180 GHz and shows a fairly good correlation with the simulation. Simulations show a minimum noise figure of < 10 dB and a very flat response throughout the D-band. Measurements could not be performed because no D-band noise source was available. Input/output reflection coefficients and the reverse isolation of the PA are shown in Fig. 6(c). The measured μ-factor of >1 shows unconditional stability of the amplifier throughout the operating range. The group delay response of the PA is presented in Fig. 6(d) and shows an average value of about 40 ps with a group delay variation of about ±15 ps within the entire D-band, which is a reasonable performance for full-band high-speed broadband communications. The first set of large-signal measurements (cf. Figs 7(a) and 7(b)) were taken at a supply voltage of 2.7 V and with the same biasing as in the case of small-signal results. The measured differential P _SAT is greater than 7.6 dBm over the entire D-band. The P _{1 dB} is also quite flat over frequency and varies around 3.9 dB in the D-band. The behavior of the output power, gain and PAE versus input power is plotted in Fig. 7(b), showing a peak differential output power of 11 dBm at 160 GHz. Using the external bias pads available on chip (V _B1 to V _B4 as shown in Fig. 5(a)), two further sets of power measurements were carried out at a frequency of 160 GHz. For Bias 1 (V _B1 to V _B4 optimized for high PAE), a current density slightly lower than the recommended peak-f _T current density at a V _CC of 2.7 V is selected. When V _CC is raised, the voltage and the current swing is increased until reaching its maximum value about 2.9 V, at which output power is increased by 0.5 dB at the expense of reduced PAE. For Bias 2 (V _B1 to V _B4 optimized for high output power), the current density is reduced much further, so that this time the maximum current swing limit is reached around 3.1 V (cf. Fig. 7(c)) and achieves the highest output power of about 12 dBm with a PAE of about 4.5%. The designed PA is compared with the published state-of-the-art Si-based PAs working in the D-band in Table 1.

Fig. 5. Chip micrographs. (a) Differential D-band broadband PA with integrated baluns. Chip size including pads: 0.7 × 0.6 mm². (b) D-band wideband modified Marchand balun. Chip size including pads: 0.425 × 0.4 mm².

Fig. 6. Small-signal measurements (solid lines) and simulations (dotted lines). (a) Insertion loss and input reflection coefficient of the modified Marchand balun. (b) Small-signal gain and NF of the PA. (c) Input/output reflection coefficients and isolation of the PA. (d) μ-factor and group-delay of the PA.

Fig. 7. Large-signal measurements (solid lines) and simulations (dotted lines). (a) Saturated output power and 1-dB output compression point of the PA versus frequency at a constant 2.7 V supply. (b) Output power, power-gain and PAE of the PA as a function of input power at 160 GHz. (c) Saturated output power, and (d) PAE, as a function of supply voltage and two different biasing conditions adjusted for optimal power efficiency (bias 1) and optimal output power (bias 2) at 160 GHz.

Table 1. Performance comparison of Si-based PAs in Si/SiGe processes.

* Small-signal 3-dB.

† Differential results.

‡ Core-area only.

VI. CONCLUSION

This paper presented the analysis and design of the first full D-band Si-based PA. Relying on high-frequency π-model of a cascode stage, analytical expressions for transimpedance-gain are developed which help in understanding the behavior, dependencies, and best method of achieving wideband frequency response. Following the procedure four cascode stages are staggered tuned to realize a 57% 3-dB bandwidth of 80 GHz, the highest for any lumped circuit design operating in the D-band. The design also achieves the highest GBW/P _DC ratio of 5.2 for D-band PAs. Based on its characteristics, the PA finds its use in many applications such as very high-resolution radars, wideband instrumentation systems, and ultrahigh-speed communications systems.