Introduction

This chapter starts by addressing some implementation methods for digital filtering algorithms and structures. The implementation of any building block of digital signal processing can be performed using a software routine on a simple personal computer. In this case, the designer's main concern becomes the description of the desired filter as an efficient algorithm that can be easily converted into a piece of software. In such cases, the hardware concerns tend to be noncritical, except for some details such as memory size, processing speed, and data input/output.

Another implementation strategy is based on specific hardware, especially suitable for the application at hand. In such cases, the system architecture must be designed within the speed constraints at a minimal cost. This form of implementation is mainly justified in applications that require high processing speed or in large-scale production. The four main forms of appropriate hardware for implementing a given system are:

• The development of a specific architecture using basic commercial electronic components and integrated circuits (Jackson et al., 1968; Peled & Liu, 1974, 1985; Freeny, 1975; Rabiner & Gold, 1975;Wanhammar, 1981).

• The use of programmable logic devices (PLDs), such as field-programmable gate arrays (FPGAs), which represent an intermediate integrated stage between discrete hardware and full-custom integrated circuits or digital signal processors (DSPs) (Skahill, 1996).

• The design of a dedicated integrated circuit for the application at hand using computer-automated tools for a very large scale integration (VLSI) design.

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