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Stress in Titanium Disilicide Layers, During and After Formation.

Published online by Cambridge University Press:  22 February 2011

J. F. Jongste ,
F. E. Prins ,
G. C. A. M. Janssen  and
S. Radelaar
J. F. Jongste
Affiliation:
Centre for Submicron Technology, Delft University of Technology, P.O. Box 5046, 2600 GA Delft, the Netherlands.
F. E. Prins
Affiliation:
Centre for Submicron Technology, Delft University of Technology, P.O. Box 5046, 2600 GA Delft, the Netherlands.
G. C. A. M. Janssen
Affiliation:
Centre for Submicron Technology, Delft University of Technology, P.O. Box 5046, 2600 GA Delft, the Netherlands.
S. Radelaar
Affiliation:
Centre for Submicron Technology, Delft University of Technology, P.O. Box 5046, 2600 GA Delft, the Netherlands.
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Abstract

During and after formation of a thin layer of titanium disilicide (TiSi2) on a silicon substrate stress is caused in several ways: Intrinsic stresses are due to the deposition process or to phase transformations and grain growth of the deposited material. Extrinsic stresses are caused by thermal effects: the difference in linear thermal expansion coefficients of the layer and the substrate respectively. Problems related to stresses can occur in semiconductor device fabrication. Stresses can deteriorate gate oxides in MOSFETs and can cause cracks in interconnect lines. Also, focusing problems in lithographic steps can occur because of wafer warpage. In this paper some examples of the different types of stress that can occur are shown and discussed. Both multilayer and self aligned Ti-Si samples have been studied: The advantage of the use of Ti-Si multilayers to produce TiSi2 is that diffusion has to proceed only over a short distance i.e., the multilayer period. So the annealing time can be short. In the self aligned silicidation process, where a layer of a titanium layer on top of a silicon substrate is annealed, the diffusion length is equal to the thickness of the Ti layer. Because longer annealing times are needed, the latter type is used to monitor stress during formation.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 130: Symposium C – Thin Films: Stresses and Mechanical Properties I , 1988 , 321
Copyright
Copyright © Materials Research Society 1989

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References

[1]. Thornton, J.A., Deposition Technologies for Films and Coatings, R.F., Bunshah (ed.), Noyes Publications, New Jersey 1982.Google Scholar
[2]. Stoney, G.G., Proc. Royal Society London, A82, p172, 1909.Google Scholar
[3]. Steel, W.H., Interferometry, Cambridge Monographs on Physics, (Cambridge University Press, Cambridge, 1967), p211.Google Scholar
[4]. Teal, V.L. and Murarka, S.P., J. Appl. Phys. 61, 5038 (1987).CrossRefGoogle Scholar
[5]. Wessels, P.J.J., Jongste, J.F., Janssen, G.C.A.M., Mulder, A.L., Radelaar, S. and Loopstra, O.B., J. Appl. Phys. 63, 4979 (1988).CrossRefGoogle Scholar
[6]. Timoshenko, S.P. and Goodier, J.N., Theory of Elasticity, 3rd ed., (McGraw-Hill, Singapore, 1982), p. 8.Google Scholar
[7]. Touloukian, Y.S., Kirby, R.K., Taylor, R.E. and Lee, T.Y.R., Thermal Expansion of Nonmetallic Solids, Thermophysical properties of matter, vol.13, (IFI/Plenum, New York, 1977), p. 1212.Google Scholar