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Formation of Ohmic Contacts to InP by Means of Rapid Thermal Low Pressure (Metalorganic) Chemical Vapor Deposition (RT-LPMOCVD) Technique
Published online by Cambridge University Press: 26 February 2011
Abstract
The viability of forming an ohmic contact to InGaAs/InP structures by means of a load-locked RT-LP(MO)CVD integrated process, was demonstrated. The wafer was loaded into the reactor chamber and was exposed to a sequence of dry and in-situ processes which led to the formation of an ohmic contact. After an in-situ cleaning of the wafer through a thermal cycle at 500°C under a flow of tertiarybutylphosphine (TBP), which provided the needed free hydrogen for a mild etching of the surface, however with an over pressure of P to eliminate surface degradation, a layer of silicon oxide (SiOx ) was rapid thermal chemical vapor deposited (RT-CVD) onto the InGaAs/InP sample via a rapid thermal cycle (500°C,30 s) in a low pressure O2 and 2% diluted SiH4. Dry etching of 50–150 μm wide contact stripes was carried out using a contact stencil mask by an electron-cyclotron resonance (ECR) dry etching. Subsequently the wafer was reloaded through the load-lock to the main chamber and a TiNx layer were selectively deposited into the via-holes and processed to provide an ohmic contact to the InGaAs/InP substrate. Finally, a blanket deposition of conducting cap layer was realized by means of RT-LP(MO)CVD. This work provides a solid demonstration to the feasibility of the single-wafer-integrated-process (SWIP) as an approach to replace the batch process traditionally used for manufacturing the InP-based optoelectronic devices.
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- Copyright © Materials Research Society 1992
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