I. INTRODUCTION
The general trend of space-borne communication and sensing systems towards higher data throughput, frequency-agility, as well as higher power together with higher efficiency, demands more broadband and more flexible transmit/receive-modules (T/R modules). Furthermore, reconfigurability becomes an important factor to adapt to changing requirements during the lifetime of a given system. In many devices – in particular – space borne systems, components cannot be changed once deployed. Therefore, adjustments during lifetime can only be done, if they have already been foreseen and prepared during design and assembly.
Electrical reconfigurability, multi-band functionality and optimized performance can be achieved by a frequency-agile T/R module, as depicted in Fig. 1. All subcomponents of such a module have to be designed either to permanently cover the complete frequency range or to be frequency-agile. While passive components often offer broadband performances, active devices suffer from limitations on the ratio of frequency range to performance.
Fig. 1. Frequency-agile T/R module.
Fig. 2. Frequency-agile PA with RF-MEMS-based tunable matching networks. (a) PA and (b) PA including tunable matching.
To be able to change a power amplifer's (PA) frequency range of operation, the transistor needs to be matched at the new operating frequency. The performance of fixed matching networks is restricted by a trade-off between bandwidth and matching. Tunable narrowband matching networks provide optimum matching conditions for different frequency-bands and modes of operation. However, for that, very low-loss tuning devices are needed.
For this radio-frequency-microelectromechanical-systems (RF-MEMS) are well suited. Malmqvist et al. [Reference Malmqvist1] have presented variable matching networks for gallium arsenide (GaAs)- and silicon germanium (SiGe)-low-noise amplifiers (LNAs) based on capacitively loaded lines. Loading of capacitive and inductive elements is used in [Reference Malmqvist2] to match a GaAs LNA. Qiao et al. [Reference Qiao, Molfino, Lardizabal, Pillans, Asbeck and Jerinic3] show results of a PA matched by a double stub tuner with a varactor and RF-MEMS as tuning elements. Also, Lu et al. [Reference Lu, Peroulis, Mohammadi and Katehi4] show RF-MEMS-based double stub networks for amplifiers.
This work targets gallium nitride (GaN) single-transistor high PA applications as a vital part of multi-purpose frequency-agile T/R modules. Such applications can feature specifications, which cannot be realized with a single amplifier module. Therefore, several amplifier modules have to be realized in parallel and switching-banks or multiplexers become necessary. This results in additional losses, more complex circuit design, and larger overall footprints. These applications can profit from the use of multi-mode matching networks (M3Ns), enabling multi-mode- and multi-frequency-amplifier modules.
Figure 1 depicts a frequency-agile multi-mode PA with RF-MEMS-based M3Ns, for which the EADS in-house silicon-based RF-MEMS technology [Reference Siegel, Ziegler, Schonlinner, Prechtel and Schumacher5] is used. EADS in-house switches have already been demonstrated to provide hot-switching at a power level of 10 W [Reference Ziegler, Gautier, Stehle, Schoenlinner and Prechtel6].
Today, commonly-used satellite communication systems work in the frequency range between 1.5 and 18.1 GHz, while this paper focuses on C- to X-band communication (3.7–8.4 GHz). Tunable single-stub matching networks for a 6 W GaN transistor have been designed to optimally match the transistor for:
• four well-distributed frequency bands in the range from 3.5 to 8.5 GHz;
• maximum-output-power- or a maximum-power-added-efficiency (PAE)-mode.
For demonstration, these matching networks have been fabricated and characterized in a hybrid integration with a vector network analyzer (VNA) at low-input RF power.
As a second application switches are another important part of T/R module routing the signal according to transmit or receive case. The T/R module in Fig. 1 contains four single pole double throw (SPDT)-switches with different requirements in terms of isolation and power handling capability. Two switches have been designed and characterized, one for low-power-handling applications and one for high-power-handling applications with high isolation specifications. Two commercially available switches (Radant MEMS RMSW220HP and TriQuint TGS2353) were also integrated and characterized in a mutual comparison.
II. FREQUENCY-AGILE MATCHING NETWORKS
A) Fixed frequency versus multi-band matching for PAs
A well-known limitation on the performance of fixed matching networks is given by the Bode–Fano-criterion [Reference Fano7], which Steer [Reference Steer8] simplifies to
$$\displaystyle{w \over {\omega _0 }} \ln \left({\displaystyle{1 \over {\left\vert {\Gamma _{avg} } \right\vert }}} \right)\leq \displaystyle{\pi \over {Q_{load} }}\comma \;$$with | Γavg | being the average absolute in-band reflection coefficient over the fractional bandwidth w/ω 0 of a lossless matching network. Q load describes the quality factor of the load to be matched.
Consequently, a matching network can be designed to achieve optimum narrowband performance or offer a lower performance over a wider frequency range. Therefore, in practical systems, performance has to be traded for bandwidth according to different specifications. In addition, Steer [Reference Steer8] concludes that a higher Q load results in a narrower bandwidth for a constant Γavg, which significantly affects the performance in multi-band applications.
Being aware of these restrictions, one can implement tunable narrowband M3Ns, which have the potential for improved performances over bandwidth. Furthermore, tunable M3Ns can present different impedances to a transistor, tuning it for different operation modes at constant operational frequencies. Depending on the current situation, the PA can be tuned from maximum-PAE-mode to maximum-output-power-mode, whenever more output power is needed. While a fixed matching network for PAs is always subject to compromises, a tunable M3N enables optimized performance for different application scenarios and provides new possibilities.
B) Chosen transistor
The M3Ns are designed for a GaN transistor from Fraunhofer Institute of Applied Solid-State Physics (IAF) in Freiburg, Germany. The AlGaN/GaN high-electron mobility transistor (HEMT) on semi-insulating semi-insulating silicon carbide (SiC) used has a gate length of 0.25 µm and operates at a bias of V DS = 28 V. The harmonic balance simulations are performed within Agilents Advanced Design System with a verified large-signal model in continuous wave (CW)-operation at the respective frequencies for a quiescent current of 100 mA/mm and an input power level leading to a compression level of P-2 dB. The maximum current of the transistor is 1200 mA/mm and the breakdown voltage exceeds 100 V. The HEMT is connected in microstrip transmission line technology with a substrate thickness of 100 µm. The reference planes are chosen to match the actual connection pad to the switches.
Figure 3 depicts the source and load impedances, which have to be presented to the transistor for delivering maximum output-power or maximum PAE in class A operation, being biased with V DS = 28 V and I D = 120 mA. The corresponding matching points R + jX for maximum-output-power-mode (blue triangles, Fig. 3) are closer to the real-impedance axis of the Smith chart and thus have lower Q load = X/R. Consequently, the matching network states for maximum-output-power-mode are expected to be more broadband than for the maximum-PAE-mode.
Fig. 3. Large-signal matching points of the chosen GaN transistor. Data for 3.5–8.5 GHz, normalized to 50 Ω. Filled symbols indicate data point at 3.5 GHz.
Another important factor is the intrinsic loss of the network, which limits the area of the Smith chart, which can be covered by a matching network. The matching points of the transistor's input are close to the border of the Smith chart, so that the matching is difficult.
Since the input matching points for maximum-output-power- and maximum-PAE-mode do not differ very much over frequency, it is not distinguished between the two different modes for the input matching. Therefore, only a matching network for maximum-PAE-mode is designed.
C) Design approach
1) INTEGRATION
Bond wires are necessary to integrate the M3Ns together with the transistor. These can either be compensated by dedicated matching structures on the silicon chip, be integrated as a part of the matching networks, or be absorbed into the imaginary part of the impedance to be matched. The first approach seems feasible, but consumes additional chip area; the second approach is mainly useful, when discrete components are used. Here, the bond wire's inductance is absorbed into the transistor impedance to build Γload for evaluating the design equations – equations (2) and (3) – later on.
The bond wires connecting M3N and surrounding printed circuit boards (PCBs) are not considered in the matching network design. Additional switches can be integrated on-chip as part of a T/R module or signal routing. However, it is possible to well compensate the bond wire's inductance with matching networks on the surrounding PCB or add additional structures in a redesign.
2) SINGLE-STUB TOPOLOGY
The tuneable single-stub topology of this work is illustrated in Fig. 4, showing eight different line stubs. This resembles a classical single-stub matching network, when only one single stub line is connected to the through-line at a time. Therefore, RF-MEMS are used and positioned directly at the through-line, reducing parasitic influences of unused stub lines. Five of the eight possible states are indicated in the photograph by different line styles and colors. This design was chosen as it is, because it is easy to implement, straight forward to design, and suitable to match theoretically any not purely complex impedance.
The stub lines of the M3Ns are realized open-ended, since the RF-MEMS process does not allow for through silicon vias. For open-ended stubs and line impedances equal to the system impedance Z 0 the distance d between stub and load, and the stub length l can be calculated as:
$$d=\displaystyle{\lambda \over {4\pi }}\left({\angle \Gamma _{load} \pm \arccos\left({ - \left\vert {\Gamma _{load} } \right\vert } \right)} \right)\comma \;$$
$$l=\displaystyle{\lambda \over {2\pi }}\hbox{arc}\!\cot \left({\displaystyle{1 \over 2} \tan\left({\displaystyle{{4\pi } \over \lambda }d - \angle \Gamma _{load} } \right)} \right).$$The results have to be reduced modulo λ/2 to obtain positive, minimum length values [Reference Orfanidis9, chapter 12]. The equations give two possible solutions, however, in an M3N with several stubs, a compromise between the possible geometrical positions of all stubs has to be found. As described in [Reference Figur, van Raay, Quay, Vietzorreck and Ziegler10], radial stubs can be used to reduce space consumption overall. This is demonstrated in this work for the input matching network.
3) MATCHING NETWORKS DESIGNED
The designed states for gate and drain matching are summarized in Table 1. The input matching network uses the same states for maximum-output-power- as well as for maximum-PAE-mode while the output matching network features four dedicated states for each operational mode.
Table 1. Matching networks designed.
E, maximum-power-added-efficiency-mode; P, maximum-output-power-mode.
Table 2 gives a comparison of the calculated dimensions (d calc, l calc) for the output matching network according to equations (2) and (3), and the chosen dimensions (d opt, l opt) which were optimized through circuit simulations. The deviations can be explained with the parasitics of the open switches along the through line and the influence of the closed switches within the stubs. Geometrical restrictions in placing the stubs along the through line – like keeping a minimum distance between two stubs – effectively restrict the matching as calculated stub distances cannot always be realized.
Table 2. Comparison of calculated and chosen dimensions for the output matching network.
PAE, tuned for maximum-power-added-efficiency; P out, tuned for maximum-output-power.
D) Measurements and characterization
1) METHOD OF ANALYZING THE MEASUREMENT RESULTS
A comparison of the measurements taken by a VNA at low-input RF power and previous simulations shows good agreement. The down-state capacitance of the RF-MEMS-switches is found to be somewhat lower and the losses in the silicon substrate are somewhat higher than expected.
Figures like insertion and return loss can only be well judged in combination with the transistor, but not within a 50 Ω system. Therefore, the measurement setup needs to be deembedded from the results and a representation of the transistor has to implemented as depicted in Fig. 5.
Fig. 5. Evaluation of measurement results. 50 Ω port is on silicon chip.
The deembedded measurements represent the electrical behavior of the diced silicon chip itself in a 50 Ω system, which then can be recalculated to account for the integration of the transistor. The data are simulated with the transistor impedances as a port element and a series inductor to represent the bond wire between transistor and matching network.
The S-parameters presented in the following subsections are obtained by this method. Since the measurement results are recalculated with respect to the transistor impedances, the return losses are used as measures of how well the large-signal matching points have been synthesized according to Fig. 3.
2) INPUT MATCHING NETWORK
The integration of the input matching network for measurement is depicted in Fig. 6. The picture shows the diced silicon chip in a hybrid assembly surrounded by four PCB providing contact pads for ground-signal-ground-probes (GSG-probes) and connectors for the control signals. RF and control signals on the different parts are connected by bond wires, while the conductive carrier provides a common GND-plane.
Fig. 6. Hybrid measurement setup of diced input matching network. Network realized with radial stubs.
A comparison between targeted, simulated, and measured output impedances of the input matching network is given in Fig. 7. Solid lines indicate the large-signal matching points for maximum-output-power-and maximum-PAE-mode from 3.5 to 8.5 GHz. The simulated points – black, rotated sandclocks, Fig. 7 – were optimized by circuit simulation to minimize return losses for maximum PAE and fit the targeted impedances well. Owing to higher substrate losses, lower down-state capacitances, and possible inaccuracies in the modeled deembedding structures, the measured impedances are shifted inwards and rotated counterclockwise on the Smith-chart.
Fig. 7. Comparison between targeted, simulated, and measured large-signal matching points for input matching network. Solid lines: targeted data for 3.5–8.5 GHz, normalized to 50 Ω, filled symbols indicate data point at 3.5 GHz. Single rotated, black sandclocks: simulated values. Single up-side down, orange triangles: measured values. Simulated and measured states according to Table 1.
Figure 8 depicts the evaluated measurement results of the input matching network. The network clearly matches four different frequency-bands, but matching is not optimum with 5–10 dB for the first three states and less than 5 dB for the one at 8.5. GHz.
Fig. 8. Measurement results of the input matching networks for maximum-PAE-mode. Port 1: transistor, port 2: 50 Ω system. (a) Matchings versus frequency and (b) insertion losses versus frequency.
Figure 7 shows that the measured impedances are shifted compared to the simulated values. This can result in a shift of resonance frequencies in Fig. 8(a), depending on the frequency–response curve of the individual states and the impedances to be matched. Owing to the frequency resolution of two samples per GHz, the shifted minimum could be difficult to be observed. Together with higher substrate losses and modeling inaccuracies, the deviations from expected return losses of 10–20 dB can be explained.
As stated before, it is expected that one matching network can be used for both, the maximum-PAE and the maximum-output-power modes. The measurement results of the network confirm this, giving similar results for maximum-output-power-mode (Fig. 9). The small impedance difference for both modes results mainly at low frequencies in deviations of matching and, therefore, insertion loss. A closer synthesis of the transistor impedances would enhance the performance.
Fig. 9. Measurement results of the input matching networks for maximum-output-power-mode. Port 1: transistor, port 2: 50 Ω system. (a) Matchings versus frequency and (b) insertion losses versus frequency.
3) OUTPUT MATCHING NETWORK
The integration was carried out in the same way as shown for the input matching network in Fig. 6. A photograph of the silicon chip is depicted in Figs. 4 and 5.
A comparison between targeted, simulated, and measured input impedances of the output M3N is given in Fig. 10. Solid lines indicate the large-signal matching points for maximum-output-power- and maximum-PAE-mode from 3.5 to 8.5 GHz. The simulated points – black, rotated sandclocks, Fig. 7 – were optimized by circuit simulation and fit the targeted impedances quite well. As seen before, the measured impedances are shifted in the Smith-chart compared to the simulated and targeted values.
Fig. 10. Comparison between targeted, simulated, and measured large-signal matching points for output matching network. Solid lines: targeted data for 3.5–8.5 GHz, normalized to 50 Ω, filled symbols indicate data point at 3.5 GHz. Single rotated, black sandclocks: simulated values. Single up-side down, orange triangles: measured values. Simulated and measured states according to Table 1.
Figure 11 illustrates the network's performance for the maximum-PAE-mode. Return losses are better than 15 dB for the states at 5 and 6.5 GHz and around 10 dB or better for the other two states. Insertion losses are close to the expected values between 0.7 and 1.2 dB. Higher losses and lower down-state capacitance result in a degradation of the performance, but the network shows reasonably good performance.
Fig. 11. Measurement results of the combined output matching networks for maximum-PAE-mode. Port 1: transistor, port 2: 50 Ω system. (a) Matchings versus frequency and (b) insertion losses versus frequency.
The results for the maximum-output-power-mode are given in Fig. 12. In the frequency range from 3.5 to 7.5 GHz there is always at least one state, which provides return losses of 15 dB. Up to 7 GHz, insertion losses are better than 1 dB. State 7 has possibly moved to a higher frequency, lowering the transistor's matching to 10 dB at 8 GHz.
Fig. 12. Measurement results of the combined output matching networks for maximum-output-power-mode. Port 1: transistor, port 2: 50 Ω system. (a) Matchings versus frequency and (b) insertion losses versus frequency.
4) COMPARISON WITH STATE-OF-THE-ART
Table 3 gives a summary of this work in comparison to other published results. A direct comparison with other works is difficult, since different frequency-bands and transistors to be matched demand for different matching conditions.
Table 3. Comparison with state-of-the-art.
The performance in terms of insertion and return losses of the output matching network is comparable to the data given in [Reference Malmqvist1, Reference Malmqvist2, Reference Lu, Peroulis, Mohammadi and Katehi4]. However, the M3Ns presented in this work exhibit a wider fractional tuning range of 77 and 90% as compared to a maximum of 45% in [Reference Malmqvist2]. In addition, the networks are designed to tune the transistor to different operating modes without changing the operating frequency.
The output matching network allows to match the transistor for maximum output-power with a return loss of 15 dB and more, for frequencies up to 7.5 GHz. In this frequency range the single matching states overlap in a way so that the transistor can be used at any frequency with a good matching.
III. SWITCHES
A) Low-power-handling switch: complementary-metal-oxide-semiconductor (CMOS)-SPDT
1) DESIGN
As low-power device a CMOS – switch was designed in a 0.18 µm RF CMOS silicon-on-insulator (SOI) technology provided by Towerjazz. The schematic of the switch is given in Fig. 13, realized in a series shunt configuration, using two transistors in series in each branch.
Fig. 13. Schematic of CMOS-switch. (a) Schematic and (b) photograph of integration.
In order to minimize the losses through gate and body, 60 kΩ series-resistors are used at the corresponding terminals. This is often also referred to as floating body technique. In addition, the body contacts are biased with a negative direct current (DC) voltage when the transistor is in off-state. Hence, the parasitic capacitance between drain and source is minimized and isolation is improved.
The final switch occupies an area of around 0.29 mm2 including all 14 bond pads. Several deep trench rings are placed around each transistor for improved isolation and to enable the negative body bias.
2) MEASUREMENT AND CHARACTERIZATION
The CMOS-switch was fabricated and integrated in a Rogers RT/Duroid 5880 PCB in a cavity to minimize bondwire length. Matching structures are used to compensate the effect of the bondwires. The measurement results are shown in Fig. 14.
Fig. 14. Measurement results of the CMOS-switch. Dashed lines: simulation, solid lines: measurements. (a) Matchings and insertion losses versus frequency and (b) isolation versus frequency.
Insertion losses of 1.1–2.3 dB of the integrated CMOS-switch are close to the simulated value of ≈1 dB at lower frequencies, which does not include bondwire inductivity and bonding pad capacities. Return losses are higher than 14 dB and isolation greater than 12 dB over the complete frequency range.
B) High-power-handling switch: RF-MEMS-SPDT
1) DESIGN
The silicon-based RF-MEMS has been designed on the EADS in-house-process, capable of hot-switching up to 10 W [Reference Ziegler, Gautier, Stehle, Schoenlinner and Prechtel6]. An internal standard switch is used as a basic switching-element in the design, which is given in Fig. 15.
Fig. 15. Photograph of integrated silicon RF-MEMS-SPDT. Input on bottom side, outputs left and right, control lines on top.
Each branch of the SPDT contains two switches to provide high isolation for high-power applications. To compensate the series capacitance of the RF-MEMS an inductive piece of line is introduced close to the input of the SPDT.
2) MEASUREMENT AND CHARACTERIZATION
The chip was integrated in a cavity with compensation structures for the bondwire inductance to characterize the switch itself. The measurement results of one of the symmetrical paths are depicted in Fig. 16 and match the simulation results, considering the lower down-state capacitance and higher substrate losses, as stated before.
Fig. 16. Measurement results of the silicon RF-MEMS-switch. Dashed lines: simulation, solid lines: measurements. (a) Matchings and insertion loss versus frequency and (b) isolation versus frequency.
Insertion losses are measured to be 0.8–1.2 dB above 4 GHz. At lower frequencies insertion losses rise up to 2.5 dB, due to the lower down-state capacitance. Return losses are higher than 10 dB above 4.5 GHz. Since no dedicated external matching structures are used – only compensation for the bondwire inductance is applied – return losses could possibly be improved by dedicated matching on the PCB. Isolation is measured to be better than 37 dB in the measured frequency range of 2–18 GHz.
C) Investigation on commercial SPDT-switches
1) RF-MEMS-SWITCH
A commercially available RF-MEMS-SPDT from Radant MEMS has been measured as a medium power device. Figure 17 depicts the measurement results of the device integrated in a Rogers RT/Duroid 5880 PCB.
Fig. 17. Measurement results of the commercial RF-MEMS-switch. (a) Matchings and insertion losses versus frequency and (b) isolation versus frequency.
Approximately 15 dB of isolation were measured at the upper frequency range, while below 9 GHz, considerably higher values of 35 dB were achieved. Return losses are higher than 17 dB in transmission configuration. Insertion losses are below 0.8 dB but slightly different in both paths. A resonance occurs at around 13 GHz, which is very likely due to the integration and should be removed in future designs.
2) GaN-SWITCH
As a second high-power-capable device, a commercially available GaN-switch from TriQuint has been integrated with a Rogers RT/Duroid 5880 substrate and the overall set-up was measured. The results for one of the two symmetrical paths are given in Fig. 18, and show low-insertion loss of 0.5–1.6 dB and return losses higher than 15 dB. Isolation is higher than 20 dB.
Fig. 18. Measurement results of the GaN-switch. (a) Matchings and insertion losses versus frequency and (b) isolation versus frequency.
D) Comparison
Table 4 summarizes the measurement results for the different switches between 2 and 18 GHz. The low-power-handling switches are similar in performance, with lower insertion losses for the commercial device above 8 GHz. However, the integration of the commercial SPDT is assumed to be responsible for the resonance in the measurements, which has to be removed to be usable. However, in the targeted frequency range of the PA, both switches can be used.
Table 4. Comparison of different evaluated switches for 2 to 18 GHz.
*Taken from datasheet.
The high-power-handling switches show different characteristics. While the commercial device features lower overall insertion loss and higher return loss, the self-designed SPDT provides higher isolation. In addition, the commercial GaN-switch uses non-linear devices, and therefore, suffers from loss compression with higher input power – in contrast, RF-MEMS are considered to be highly linear devices. The EADS in-house technology in-use has been demonstrated to be capable of hot-switching up to 10 W of RF power without performance degradation [Reference Ziegler, Gautier, Stehle, Schoenlinner and Prechtel6]. Below 4.5 GHz insertion loss is significantly higher than for the commercial GaN-switch, due to the capacitive behavior of the switch. Consequently, the choice of the high-power-handling switch depends on the specifications and requirements of the actual application.
A low-frequency switch was designed to extend the usable frequency range below 4.5 GHz for future designs. The single pole single throw (SPST) was integrated in a Rogers RT/Duroid 5880 PCB in a similar way as the other switches and characterized. The switch provides insertion loss lower than 1.1 dB in the frequency range from 2 GHz up to 40 GHz. The return losses were not optimized with matching structures and were measured to be better than 10 dB above 2 GHz. Isolation is higher than 27 dB at 40 GHz and below 35 dB at 10 GHz.
IV. CONCLUSIONS
This paper demonstrates tunable single-stub matching networks for a 6 W GaN transistor and different switches. Both are considered to be used for frequency-agile T/R module. The output M3N can switch the transistor's mode of operation between maximum-delivered-output-power- and maximum-PAE-mode for four frequencies, providing good matching conditions of 10–20 dB. This functionality is demonstrated in the frequency range from 3.5 to 8.5 GHz.
Two SPDT-switches have been designed, characterized and compared to commercial equivalents. While the low-power-handling SPDTs show similar performance up to 8 GHz, the high-power-handling switches provide different characteristics. The designed high-power-handling switch provides isolation of higher than 37 dB compared to 20 dB of the commercial device. For frequencies below 4.5 GHz insertion loss is higher than demonstrated for the commercial device, due to the capacitive behavior. Since the commercial device shows loss compression with increasing input power, the linear RF-MEMS-based switch provides more constant characteristics for high-power applications.
As next step the matching networks will be integrated with the transistor to characterize the frequency-agile PA.
ACKNOWLEDGEMENTS
This work has been financially supported by FP7 – Space, Project Saturne, Grant agreement no 242458.
Sascha A. Figur received his Dipl.-Ing. (FH) degree in Electrical Engineering (2007) and his M.Sc. degree in Information Technology (2009) from Fachhochschule Münster Abteilung Steinfurt, Germany. Currently he is working on his Dr.-Ing. at EADS Innovation Works, Ottobrunn, Germany, where his research interests are on adaptive and frequency-agile subsystems for e-scan antennas.
Friedbert van Raay received the M.Sc. degree in Electrical Engineering from the Technical University of Aachen, Aachen, Germany, in 1984, and the Ph.D. degree from the University of Kassel, Kassel, Germany, in 1990. From 1992 to 1995, he was with SICAN GmbH, Hannover, Germany, where he was involved with RF system development and measurement techniques. In 1995, he returned to the University of Kassel, as a Senior Engineer, where he supervised the Microwave Group, Institute of High Frequency Engineering. In November 2001, he joined the Fraunhofer Institute of Applied Solid-State Physics (IAF), Freiburg, Germany, as a Supervisor of the Device Modeling Group. His current research interests are development and characterization of high-speed digital and high-power millimeter-wave GaAs and GaN devices and circuits.
Rüdiger Quay received the Diploma degree in Physics from Rheinisch-Westfälische Technische Hochschule (RWTH), Aachen, Germany, in 1997, and a second Diploma in Economics in 2003. He received his doctoral degree in Technical Sciences (with honors) from the Technische Universität Wien, Vienna, Austria in 2001, and in 2009 he received the venia legendi (habilitation) in microelectronics, again from the Technische Universität Wien. He is currently the leader of RF-devices and circuit characterization group, and deputy head of the business field Gallium RF-power electronics with the Fraunhofer Institute of Applied Solid-State Physics Freiburg, Germany. He has authored and coauthored over 150 refereed publications and two monographs. Dr. Quay is co-chairman of MTT-6, Microwave and Millimeter Wave Integrated Circuits and an associate editor of the international journal of microwave and wireless technologies.
Peter Lohmiller received his Dipl.-Ing. in Electrical Engineering from Ulm University in 2009. He then became a research assistant at the institute of electron devices and circuits and is currently working on circuit design for cognitive radio applications.
Larissa Vietzorreck was born in Düsseldorf, Germany. She received her Master's degree in Electrical Engineering (Dipl.-Ing.) from the Ruhr-Universität Bochum, Germany, in 1992. From 1992 to 1997 she was a Research Assistant in the Department of Electrical Engineering of the FernUniversität in Hagen where she got her doctoral degree (Dr.-Ing.). In 1998, she joined the Lehrstuhl für Hochfrequenztechnik at the Technische Universität München, Germany, as an Assistant Professor. In 1999, she was a conference secretary of the European Microwave Conference in Munich and 2012 scientific chair of the national URSI Kleinheubacher Tagung. She acts as reviewer for several journals and conferences and has published more than 100 contributions in journals and conference proceedings. Her current research interests are design and simulation of microstructured components and development of numerical software tools.
Volker Ziegler received his Dipl.-Ing. degree in Electrical Engineering and his Dr.-Ing. degree (with honors) both from the University of Ulm, Germany, in 1997 and 2001, respectively. From 2002 until 2003, he was a member of the “Knowledge Exchange Group for Research and Technology” at the DaimlerChrysler AG in Stuttgart, Germany. Since January 2003, he is working with EADS Innovation Works, in Ottobrunn, Germany. He is an EADS Expert for “Microwave Technologies and Systems” and is responsible for the acquisition and managing of national and international research projects in the field of key microwave technologies for advanced radar and communication systems.
