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A novel balanced-to-balanced power divider based on three-line coupled structure

Published online by Cambridge University Press:  14 January 2019

Zhen Tan
Affiliation:
School of Electronics and Information, and Tongke School of Microelectronics, Nantong University, 9 Seyuan Road, Nantong 226019, China
Qing-Yuan Lu
Affiliation:
School of Electronics and Information, and Tongke School of Microelectronics, Nantong University, 9 Seyuan Road, Nantong 226019, China
Jian-Xin Chen*
Affiliation:
School of Electronics and Information, and Tongke School of Microelectronics, Nantong University, 9 Seyuan Road, Nantong 226019, China
*
Author for correspondence: Jian-Xin Chen, E-mail: jjxchen@hotmail.com
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Abstract

This paper presents a novel balanced-to-balanced power divider (PD) based on a simple and compact three-line coupled structure for the first time. By bisecting the proposed symmetrical structure, the differential mode (DM) and the common mode (CM) equivalent circuits can be obtained for analysis. The DM equivalent circuit exhibits a three-line in-phase power dividing response, and then a resistor is added between the two outputs for achieving good isolation. Meanwhile, the CM equivalent circuit shows a three-line all-stop response so that the CM suppression in this design does not need to be considered. Accordingly, the detailed design procedure of the DM PD is given. For demonstration, a prototype centered at 1.95 GHz is designed, fabricated, and measured. The simulated and measured results with good agreement are presented, showing low DM loss and wideband CM suppression.

Type
Research Papers
Copyright
Copyright © Cambridge University Press and the European Microwave Association 2019 

Introduction

With the fast development of the modern high-speed wireless communication system, the balanced circuits or components are ever-increasingly utilized due to their high immunity to the environmental noise and interference [Reference Woestenburg1, Reference Feng and Zhu2]. Accordingly, various balanced-to-balanced power dividers (PDs) have been designed, which provide differential-mode (DM) power division and common-mode (CM) suppression in the frequency band of interest. They are easily integrated with balanced antennas as feeding networks and other balanced components. In previous research [Reference Contreras and Peden3Reference Shi, Wang, Xu, Chen and Liu7], the balanced-to-balanced PDs are developed by using microstrip line and substrate integrated waveguide. In [Reference Xia, Wu and Mao4, Reference Xia, Wu, Ren and Mao5], the microstrip PDs with equal and arbitrary dividing ratio are presented, showing good DM power allocation and high isolation as well as high CM suppression. However, the sizes of both designs are bulky, namely 0.5λ g × 0.75λ g (λ g is the guided wavelength), since the 180° phase delay line is required. In [Reference Shi and Xu6, Reference Shi, Wang, Xu, Chen and Liu7], the classic Wilkinson topology is adopted for designing the balanced-to-balanced PDs with good performance, such as wide DM bandwidth and compact size. But the two PDs with incomplete ground structure cannot be directly assembled at the bottom of the metallic cavity.

In this paper, a novel balanced-to-balanced PD is proposed by using a multilayer three-line coupled structure. It is skillfully designed so that the DM equivalent circuit exhibits a three-line dividing network while the CM equivalent circuit is an all-stop structure. Accordingly, the theoretical analysis and design procedure for the DM are given in detail without considering the CM suppression. To verify the proposed idea, a balanced-to-balanced PD is designed and fabricated, and the simulated and measured results are presented, showing good agreement.

Three-line coupled structure analysis

Figure 1 shows the layout of the proposed multilayer balanced-to-balanced PD with bi-symmetric structure, which is designed by using two layers of RO4003C substrates (permittivity ε r = 3.38, the loss tangent tan δ = 0.0027, and the thickness h = 0.508 mm). A λ g/2 microstrip line in the middle layer is fed by a pair of ports (i.e. port 1 and port 1′), which is used as the balanced input. The top layer involves four λ g/4 microstrip lines with one short-circuited end, while two pairs of ports (i.e. ports 2 and 2′, 3 and 3′) are used as two in-phase balanced outputs. The red portion represents the loaded lumped resistor R, which is used to realizing good isolation between the two balanced outputs.

Fig. 1. Layout of the proposed balanced-to-balanced PD. (a) 3-D view. (b) Cross view.

Figure 2(a) shows the transmission-line model of the proposed PD. The resistor R for isolating the balanced output ports has no effect on signal transmission from input to outputs. As a result, the balanced-to-balanced PD can be treated as a pair of back-to-back Marchand baluns (shown in Fig. 2(b)) [Reference Marchand8]. Accordingly, the design method of the traditional Marchand balun can be referred in the PD design, and the coupling strength between the transmission lines is the key parameter to the bandwidth of the PD [Reference Ang and Robertson9]. Therefore, the strong multi-layer coupling scheme is adopted, as shown in Fig. 1.

Fig. 2. Transmission-line model. (a) Proposed balanced-to-balanced PD. (b) Marchand balun.

Figures 3(a) and 3(b) show the CM and DM equivalent circuits of the transmission-line model, respectively. It is obvious that the CM equivalent circuit is an all-stop structure [Reference Pozar10] so that the CM suppression in this design does not need to be considered. And then the DM equivalent circuit is analyzed to achieve the desired power division. The three-line coupled structure in Fig. 3(b) can be fully analyzed using the fundamental modes of operation, i.e. even–even (EE), odd–odd (OO), and odd–even (OE) modes [Reference Pavlidis and Hartnagel11], as shown in Fig. 4.

Fig. 3. Equivalent circuits of transmission-line model. (a) CM. (b) DM.

Fig. 4. Sketches of the electric-field lines for the fundamental modes existing in a three-line coupled structure. (a) EE-mode, (b) OO-mode. (c) OE-mode.

PD design

To achieve good matching at the input and outputs, there must be [Reference Abbosh12]

(1)$$Z_{\rm 0} = \sqrt {Z_{1oo}Z_{1ee}} = \sqrt {Z_{2oo}Z_{2ee}} = Z_{2oe}$$

where Z ee, Z oo, and Z oe are EE-, OO-, and OE-mode impedance, respectively. In this case, the coupling factor (F) from the center line to each of the side lines can be accurately calculated by using Z oo and Z ee:

(2)$$F = \displaystyle{{Z_{2ee}-Z_{2oo}} \over {\sqrt {(Z_{1ee} + Z_{1oo})(Z_{2ee} + Z_{2oo})}}} $$

For a PD with equal power division, i.e. power division ratio 1:1, F is equal to$\sqrt {{\rm 1/2}} $. As shown in Fig. 1(a), the lengths of the coupled structure are l 1 = λ g/2 (λ g is the effective wavelength calculated at the center frequency f 0 = 1.95 GHz) and l 2 = λ g/4. The value of R is selected to achieve perfect matching for the two output ports at the centered frequency when the power division ratio is 1:1, thus it can be calculated from [Reference Guo, Zhu and Abbosh13] as $R = 2Z_{2oe}^2 / Z_0 = 100\,\Omega$.

After optimization using Ansoft HFSS, the structure parameters of the proposed balanced-to-balanced PD are as follows: l 1 = 40 mm, l 2 = 20 mm, w 1 = 3.3 mm, w 2 = 2.5 mm, w 3 = 1.15 mm, w 01 = 1.1 mm, w 02 = 2.6 mm, s = 1 mm, g = 0.6 mm, and the overall size of the PD is 40.6 mm × 8.4 mm, corresponding to the electrical size is 0.44λ g × 0.09λ g. Figure 5 shows the comparison results of the equivalent circuit and EM simulation of the PD. The fabricated balanced-to-balanced PD is shown in Fig. 6.

Fig. 5. The extracted S parameters of equivalent circuit (ADS) and EM simulation (HFSS).

Fig. 6. Photograph of the fabricated PD.

Result and discussion

Figure 7 shows the simulated and measured DM results of the proposed balanced-to-balanced PD centered at f 0. The simulated and measured results exhibit good agreement. As shown in Fig. 7(a), the measured DM return loss S dd11 shows fractional bandwidth (FBW) of 16% better than 15 dB over the frequency range from 1.75 to 2.1 GHz, and the best DM isolation S dd23 between the two balanced output ports is 34 dB. Figure 7(b) shows that the measured DM phase difference between the two output ports is from −0.4 to 0.36° over the frequency range. It can be seen from Fig. 8 that the CM suppression is better than 20 dB over the frequency range, achieving FBW of 100%. Meanwhile, the differential-to-CM results are better than 40 dB for the whole measured frequency band.

Fig. 7. The simulated and measured DM results. (a) S-parameters. (b) Phase differences between two balanced output ports.

Fig. 8. The simulated and measured CM and differential-to-CM S-parameters of the PD.

Table 1 gives the performance comparison of the proposed balanced-to-balanced PD with the previously reported counterparts. It is clear that the proposed PD is very compact due to the back-to-back Marchand balun configuration, as compared with the designs using the Wilkinson topology [Reference Xia, Wu and Mao4] and Gysel topology [Reference Xia, Wu, Ren and Mao5]. Meanwhile, the proposed PD has wideband CM suppression resulting from the all-stop structure. In addition, the bandwidth of the proposed PD is extended by using the strong multi-layer coupling scheme and it is comparable with that of the designs in [Reference Xia, Wu and Mao4, Reference Xia, Wu, Ren and Mao5].

Table 1. Performance comparison with the previous designs.

Conclusion

A novel balanced-to-balanced PD has been presented in this paper. The design procedure of the PD can be divided into DM and CM. The three-line coupled structure is used to constitute a simple and compact device. The simulated and measured performances indicate low insertion loss, small phase difference and wideband CM suppression, and the proposed balanced-to-balanced PD can be a valuable candidate for many fully balanced RF front-ends.

Author ORCIDs

Jian-Xin Chen, 0000-0002-8703-5294

Acknowledgement

This work was supported by the Natural Science Foundation of Jiangsu Province under Grant BK20161281, and by the Industrial Key Technologies Program of Nantong under GY22016015.

Zhen Tan received his B.Sc. degree from Nantong University, Nantong, China, in 2016. He is currently pursuing his M.Sc. degree in electromagnetic field and microwave technology in Nantong University, Nantong, China. His current research interests include RF/microwave balanced circuits.

Qing-Yuan Lu received his B.Sc. degree from Nanjing University, Nanjing, China, in 2010, and his M.Sc. degree in electromagnetic field and microwave technology from Nantong University, Nantong, China, in 2014. He is currently an Assistant with Xinglin College, Nantong University. His current research interests include balanced circuits and antenna.

Jian-Xin Chen received his B.S. degree from Huai Yin Teachers College, Huai'an, China, in 2001, M.S. degree from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2004, and Ph.D. degree from the City University of Hong Kong, Hong Kong, in 2008. Since 2009, he has been with Nantong University, Nantong, China, where he is currently a Professor. He has authored or co-authored more than 100 academic papers. He holds 15 Chinese patents and three U.S. patents. His research interests include RF/microwave differential circuits and antennas, dielectric resonator (DR) filters, and low temperature co-fired ceramic circuits and antennas. Dr. Chen received the Best Paper Award presented at the Chinese National Microwave and Millimeter-Wave Symposium, Ningbo, China, in 2007. He was the Supervisor of 2014 iWEM student innovation competition winner in Sapporo, Japan.

References

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Figure 0

Fig. 1. Layout of the proposed balanced-to-balanced PD. (a) 3-D view. (b) Cross view.

Figure 1

Fig. 2. Transmission-line model. (a) Proposed balanced-to-balanced PD. (b) Marchand balun.

Figure 2

Fig. 3. Equivalent circuits of transmission-line model. (a) CM. (b) DM.

Figure 3

Fig. 4. Sketches of the electric-field lines for the fundamental modes existing in a three-line coupled structure. (a) EE-mode, (b) OO-mode. (c) OE-mode.

Figure 4

Fig. 5. The extracted S parameters of equivalent circuit (ADS) and EM simulation (HFSS).

Figure 5

Fig. 6. Photograph of the fabricated PD.

Figure 6

Fig. 7. The simulated and measured DM results. (a) S-parameters. (b) Phase differences between two balanced output ports.

Figure 7

Fig. 8. The simulated and measured CM and differential-to-CM S-parameters of the PD.

Figure 8

Table 1. Performance comparison with the previous designs.